隨手記錄

1.1.2 Common Types of Analog and Mixed-Signal Circuits

類比和混合信號電路的常見類型

Analog circuits (also known as linear circuits) include operational amplifiers, active or passive filters, comparators, voltage regulators, analog mixed, analog switches, and other specialized functions such as Hall effect transistors. One of the very simplest circuits that can be considered to fall into the mixed-signal realm is the CMOS analog switch. In this circuit, the resistance of a CMOS transistor is varied between high impedance and low impedance under the control of a digital signal. The off-resistance may be as high as one megaohm or more, while the on-resistance may be 100 Ohm or less. Banks of analog switches can be interconnected in a variety of configurations, forming more complex circuits such as analog multiplexers and demultiplexers and analog switch matrices. 
類比電路（也稱為線性電路）包括運算放大器、主動或被動濾波器、比較器、電壓穩壓器、類比混合電路、類比開關以及其他專用功能，如霍爾效應晶體管。被認為屬於混合信號領域的最簡單電路之一是CMOS類比開關。在這個電路中，一個CMOS晶體管的阻值在數位信號的控制下在高阻態和低阻態之間變化。關閉時的阻值可能高達一百萬歐姆或更高，而開啟時的阻值可能為100歐姆或更低。一組類比開關可以以各種配置互相連接，形成更複雜的電路，如類比多路開關、解多路器和類比開關矩陣。

Another simple type of mixed-signal circuit is the programmable gain amplifier (PGA). the PGA is often used in the front end of a mixed-signal circuit to allow a wider range of input signal amplitudes. Operating as a digitally adjusted volume control, the PGA is set to high gains for low-amplitude input signals and low gains for high-amplitude input signals. The next circuit following a PGA is thus provided with a consistent signal level. Many circuits require a consistent signal level to achieve optimum performance. These circuits therefore benefit from the use of PGA's.

另一種簡單的混合信號電路類型是可編程增益放大器（PGA）。PGA通常用於混合信號電路的前端，以允許更廣泛範圍的輸入信號幅度。作為一個數位調整的音量控制器，PGA被設置為對於低幅度輸入信號使用高增益，對於高幅度輸入信號使用低增益。因此，跟隨PGA的下一個電路可以得到一致的信號水平。許多電路需要一致的信號水平才能達到最佳性能。因此，這些電路受益於使用PGA。

PGAs and analog switches involve a trivial interaction between the analog and digital circuits. This is why they are not always considered to be mixed-signal circuits at all.  The most common circuits that can truly be considered mixed-signal devices are analog-to-digital converters (A/Ds or ADCs) and digital-to-analog converters (D/As or DACs). While the abbreviations A/D and ADC are used interchangeably in the electronics industry, this book will always use the term ADC for consistency. Similarly, the term DAC will be used throughout the book rather than D/A. An ADC is a circuit that samples a continuous analog signal at specific points in time and converts the sampled voltages (or currents) into a digital representation. Each digital representation is called a sample. Conversely, a DAC is a circuit that covert digital samples into analog voltages(or currents). ADCs and DSCs are the most common mixed-signal components in complex mixed-signal designs since they form the interface between the physical world and the world of digital logic.

可編程增益放大器（PGA）和類比開關涉及類比和數位電路之間的平凡交互作用。這就是為什麼它們並不總是被視為混合信號電路的原因。真正可以被認為是混合信號裝置的最常見電路是類比至數位轉換器（A/D或ADC）和數位至類比轉換器（D/A或DAC）。雖然A/D和ADC這些縮寫在電子行業中可以互換使用，但本書將始終使用ADC一詞以保持一致性。同樣地，在整本書中，將使用DAC一詞而不是D/A。ADC是一種在特定時間點採樣連續的類比信號並將採樣的電壓（或電流）轉換為數字表示的電路。每個數字表示被稱為一個樣本。相反，DAC是一種將數字樣本轉換為類比電壓（或電流）的電路。在複雜的混合信號設計中，ADC和DAC是最常見的混合信號組件，因為它們構成了物理世界與數位邏輯世界之間的界面。

Comprehensive testing of DACs and ADCs is an expansive topic, since there are a wide variety of ADC and DAC designs and a wide variety of techniques to test them. For example, an ADC which is only required to sample once per second may employ a dual slope conversion architecture, whereas a 100~MHz video ADC may have to employ a much faster flash conversion architecture. The weaknesses of these two architectures are totally different. Consequently, the testing of these two converter types is totally different. Similar differences exist between the various types of DACs.

DAC和ADC的全面測試是一個廣泛的主題，因為有各種各樣的ADC和DAC設計以及各種各樣的測試技術。例如，一個只需要每秒採樣一次的ADC可能採用雙斜率轉換架構，而一個100MHz的視頻ADC可能必須使用更快的閃電轉換架構。這兩種架構的弱點是完全不同的。因此，對這兩種轉換器類型的測試也是完全不同的。各種類型的DAC之間也存在類似的差異。

Another common mixed-signal circuit is the phase-locked loop or PLL. PLLs are typically used to generate high-frequency reference clocks or to recover a synchronous clock from an asynchronous data stream. In the former case, the PLL is combined with a digital divider to construct a frequency multiplier. A relatively low-frequency clock, say, 50 MHz, is then multiplied by an integer value to produce a higher-frequency master clock, such as 1 GHz. In the latter case, the recovered clock from the PLL is used to latch the individual bits or bytes of the incoming data stream. Again, depending on the nature of the PLL design and its intended use, the design weaknesses and testing requirements can be very different from one PLL to the next.

另一個常見的混合信號電路是鎖相迴路或PLL。PLL通常用於生成高頻參考時鐘或從異步數據流中恢復同步時鐘。在前一種情況下，PLL與數位分頻器結合，以構建頻率乘法器。一個相對較低頻率的時鐘，比如50MHz，然後乘以一個整數值來產生更高頻率的主時鐘，比如1GHz。在後一種情況下，PLL中恢復的時鐘被用來閉鎖傳入數據流的個別位元或字節。同樣，根據PLL的設計性質和預期用途，從一個PLL到另一個PLL的設計缺陷和測試要求可能截然不同。